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OP-Amps

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Published in: Electronics
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Introduction  To  OP-Amps

Pranav P / Bangalore

6 years of teaching experience

Qualification: 12th (SANT PATHIK SCHOOL - 2015)

Teaches: Basic Computer, Computer for official job, MS Office, School Level Computer, All Subjects, Chemistry, Computer Science, Mathematics, Physics, C / C++, Python Programming, Android Training

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  1. Input I Input 2 Basic Op-Amp Output The op-amp is a differential amplifier with a very high open loop gain 25k AVOL 500k (much higher for FET inputs) high input impedance 500kQ ZIN IOMQ low output impedance 2506 Ro IOOQ 1
  2. Since ZIN is very high, we assume no current can flow into any lead of the op amp When the non- inverting input pin is at ground, the inverting input pin is at OV Virtual Ground vrov 11=0 Op-amp The equivalent circuit. 2
  3. Terminals on an Op Amp An op amp is a differential amplifier. This means it amplifies the difference in voltage between the two input pins. Because of this fact, its output should be OV when there is no difference between its inputs, in other words, when its inputs are at equal voltages. In a perfect ideal op amp, this should be the case when there is no voltage connected to the 2 pins. However, in real life op amps, the output is only OV when the inputs differ by a small amount known as the input offset voltage. There are 8 pins in a common Op-Amp, like the 741 which is used in many instructional courses. Offset null Pin I: • Inverting input terminal •Pin 2. .Pin 3: Non-inverting input terminal : —VCC (negative voltage Pin 4 supply) Offset null Pin 5: Output voltage .Pin 6: +VCC (positive voltage Pin 7: supply) No Connection Pin 8: Offset Null Inverting (Power) V 741 Op. Amp. 2 3 4 8 7 6 5 Not Gtr«ted (NC) Output Offset Nun Figure . Pin connection, LM741.
  4. Differential Amplifier The circuit below shows a generalized form of a differential amplifier with two inputs marked VI and The two identical transistors TRI and TR2 are both biased at the same operating point with their emitters connected together and returned to the common rail, -Vee by way of resistor Re. iff vcc VEE 02 RE The circuit operates from a dual supply +Vcc and -Vee which ensures a constant supply. The voltage that appears at the output, Vout of the amplifier is the difference between the two input signals as the two base inputs are in anti-phase with each other. So as the forward bias of transistor, TRI is increased, the forward bias of transistor TR2 is reduced and vice versa. Then if the two transistors are perfectly matched, the current flowing through the common emitter resistor, Re will remain constant. Like the input signal, the output signal is also balanced and since the collector voltages either swing in opposite directions (anti-phase) or in the same direction (in-phase) the output voltage signal, taken from between the two collectors is, assuming a perfectly balanced circuit the zero difference between the two collector voltages. 4
  5. Op Amp Equivalent Circuit The output voltage signal from an Operational Amplifier is the difference between the signals being applied to its two individual inputs. In other words, an op-amps output signal is the difference between the two input signals as the input stage of an Operational Amplifier is in fact a differential amplifier 2 1 A is the open-loop voltage gain Avd Voltage controlled voltage source
  6. The ideal op-amp Infinite voltage gain a voltage difference at the two inputs is magnified infinitely — in truth, something like 200,000 means difference between + terminal and - terminal is amplified by 200,000! Infinite input impedance no current flows into inputs — in truth, about 1012 Q for FET input op-amps Zero output impedance — rock-solid independent of load — roughly true up to current maximum (usually 5—25 mA) Infinitely fast (infinite bandwidth) — in truth, limited to few MHz range — slew rate limited to 0.5—20 V/gs 6
  7. General Op-Amp Specifications Input Bias Current The average of the currents that flow into the inverting and 1B = noninverting terminals Typical values rage from 7nA to 80 nA Differential Input Resistance Also know as the input resistance Resistance seen looking into the input terminals of the device Runs from a low of 2MQ for an LM741 to a high of 1012Q for FET input devices Output resistance Resistance between the output terminal ad ground Typical values are 75Q or less Input Capacitance The equivalent capacitance measured at either the inverting or noninverting terminal with the other terminal connected to ground May not be on all spec sheets Typical value for LM741 is 1.4pF IB+ + IB- 2 7
  8. General Op-Amp Specifications Power Supply Range May be differential or single ended Max is ± 22V Output Voltage Swing Range of output voltage Depends on power supply voltage used (typically about 85% to 90%) Usually about ± 13.5V for a power supply voltage of ± 15V Slew Rate The maximum rate of change in the output voltage in response to an input change Depends greatly on device, higher is better (output resonds faster to input changes) For LM741 it is .5V/gs while for the LM318 it is 70V ms Gain Bandwidth Product The bandwidth of the device when the open loop voltage gain is 1 8
  9. Performance Specifications of 741 IC 1 -Input bias current Input bias current 1B as the average value of the base currents entering into terminal of an op-amp Input bias current is the average value of the inverting and non-inverting current. Input Bias Current, 1b = (Ibl + Ib2)/2 INPUT BIAS CURRENT OF OP-AMP 741 3 Voc 7 741 c 6 2 2 C i rc u i tsTo d aye co 4 Vo 9
  10. Performance Specifications of 741 IC 2.1nput offset current The difference between the bias currents at the input terminals of the op- amp is called as input offset current. The input terminals conduct a small value of dc current to bias the input transistors. Since the input transistors cannot be made identical, there exists a difference in bias currents Input Offset Current is the algebraic difference between the currents into the inverting and non-inverting terminals. Input Offset Current, lio = Ilbl — Ib21 lbl — Non-inverting input current lb2 — Inverting input current The maximum input offset current value for 741 IC is 200nAu 10
  11. General Op-Amp Specifications 110 11+ 11- Input Offset Current 3 2 uA741 110 o 6 o The algebraic difference between the two input currents These are base currents and are usually nulled — Typical value 110 20 nA with a max of 200nA 11
  12. 3.DifferentiaI Input Resistance Differential Input Resistance is the equivalent resistance that is measured from any one of the input terminals by keeping the other terminal connected to ground. The value for 741 IC may go as high as 2megaohms. 4.1nput Capacitance Input Capacitance is the equivalent capacitance that us measured from any one of the input terminals by keeping the other terminal connected to ground. The typical value for 741 is 1.4pF. 5.0ffset Voltage Adjustment Range The op-amp has pins 1 and 5 marked as offset null to determine the offset voltage adjustment range. This can be found out by connecting a 10K POT between the pin 1 (negative offset null) and pin 5 (positive offset null) and the wiper of the port should be connected to the ground. By changing the POT value, the output offset voltage can be reduced to OV. The range through which the POT is varied to get the input offset voltage is the offset voltage adjustment range. For a 741 IC, typical value is ± 15mV. 6.1nput Voltage Range The same voltage when applied to both the input terminals of the 741 IC, is called the common mode voltage and the op-amp is said to have a common mode configuration. The input voltage rage for a 741 IC is ±13V. This indicate that the common mode voltage for a 741 IC can be as high as +13V and as low as -13V without disturbing the proper working of the IC. It can also be said that the input voltage range is the range of common mode voltages over which the offset voltages apply. This method is usually carried out to know the degree of matching between the inverting and non-inverting terminals. 12
  13. Performance Specifications of 741 IC 7 -Input offset voltage Input offset voltage is the voltage that is applied between the two input terminals of the op-amp to null the output. A small voltage applied to the input terminals to make the output voltage as zero when the two input terminals are grounded is called input offset voltage In the figure VI and V2 are the input dc voltages are Ra represents the resistance applied. The input offset voltage Vio could have a positive value or a negative value. Therefore, its absolute value is listed in the datasheet. It is always better to have smaller values of input offset voltage and this indicates that the input terminal are matched better INPUT OFFSET VOLTAGE OF OP-AMP 741 Vio= (VI -V2) Voc 741 c Vo www.Circ u its Tod aye com 13
  14. General Op-Amp Specifications VIO VIO < 10k < 10k o o uA741 vo VIC) = VI -V2 Input Offset Voltage VIO The voltage that must be applied to the input terminals of an op amp to null the output voltage — Typical value is 2mV with a max of 6mV When operated open loop, must be nulled or device may saturate
  15. Op-Amp Specifications — DC Offset Parameters Even though the input voltage is 0, there will be an output. This is called offset. The following can cause this offset: — Input Offset Voltage — Output Offset Voltage due to Input Offset Current — Total Offset Voltage Due to Input Offset Voltage and Input Offset Current — Input Bias Current 15
  16. 8.Common Mode Rejection Ratio (CMRR) CMRR is the ratio of the differential voltage gain to the common mode voltage gain. CMRR = Differential Voltage Gain (Ad)/ Common Mode Voltage Gain (Acm) If the value of CMRR is high, there is better matching between the 2 input terminals. For 741 IC, CMRR is 90dB. The common-mode rejection ratio (CMRR) relates to the ability of the op amp to reject common-mode input voltage. This is very important because common-mode signals are frequently encountered in op amp applications. CMRR = 20 loglAd/ Acm Ad log-I (CMRR / 20) We solve for Acm because Op Amp data sheets list the CMRR value. The common-mode input voltage is an average of the voltages that are present at the non- inverting and inverting terminals of the amplifier. icm 2
  17. General Op-Amp Specifications CMRR UI 3 2 uA741 VCM 6 VOCM VIN VOCM ACM = VCM AD CMRR = 20 log ACM The ratio of the differential voltage gain (AD) to the common mode gain (ACM) — ACM is the ratio between the differential input voltage (VINCM) applied common mode, and the common mode output voltage (VOCM) it can exceed minimum is 70db with a typical value of 90 db in properly designed circuit, it may exceed 1 1 Odb
  18. 9.0p-Amp Gain Op-Amps have a very high gain. They can be connected open- or closed loop. Open-loop (AVOL) refers to a configuration where there is no feedback from output back to the input ' AvoL may exceed 10,000 Closed-loop (AvcL) configuration reduces the gain In order to control the gain of an op-amp it must have negative feedback ' Negative feedback will reduce the gain and improve many characteristics of the op-amp 18
  19. OPEN LOOP GAIN— The main function of an operational amplifier is to amplify the input signal and the more open loop gain it has the better. Open-loop gain is the gain of the op-amp without positive or negative feedback and for such an amplifier the gain will be infinite but typical real values range from about 20,000 to 200,000. Large signal voltage gain is the ratio between the output voltage and the voltage difference between the two input terminals. Voltage Gain, A = Output Voltage (Vo)/ Differential output voltage (Vid) Typical values of large signal voltage gain for 741 IC is 200,000. 120 —100 90 80 8 60 20 1k 10k 1 1 100k fl —2 0 dB / decade --40 dB/ decade 1 1 1 1 1 IOM -.....-....-...-.--.> Frequency (Hz) GAIN VS FREQUENCY —60 dB/decade 100M 19
  20. Change in Av with Feedback Gain IOO 80 60 40 20 0 dB ACLU) for ACL(f) for ß for ß 40 400 AOL(f) = 0.01 -0.1 4k 40k 400k 4M 20
  21. Performance Specifications of 741 IC 10.SIew Rate Slew Rate is one of the most important parameters for selecting op-amps for high frequencies. SR is the maximum rate of change of output voltage per unit of time and is expressed in volts per microseconds. Slew Rate, SR = dV0/ dt An ideal slew rate is infinite which means that op-amp's output voltage should change instantaneously in response to input step voltage. By calculating slew rate we can easily find out the rate in which the output of the op-amp changes in response to changes in the input frequency. The slew rate changes with change in voltage gain and is usually specified at unity gain. The slew rate of an op-amp is always fixed. Hence, if the slope requirements of the output signals are greater than the slew rate, then distortion occurs. In the case of the 741 IC the slew rate is 0.5V/ us 21
  22. 11 .Power Bandwidth The maximum frequency at which a sinusoidal output signal can be produced without causing distortion in the signal. The power bandwidth, BWp is determined using the desired output signal amplitude and the slew rate specifications of the op amp. SR BWp = 2TtVo(max) SR = 2nfVo(max) where SR is the slew rate Example: Given: Vo(max) = 12 V and SR = 500 kV/s Find: BWp Solution: BWp = 500 kV/s = 6.63 kHz * 12 V
  23. 12.Power supply rejection ratio (SVRR) : The change in the op-amp's offset voltage caused by variations in supply voltage is called SVRR. The change in supply voltage can be denoted by dV and the corresponding change in input offset voltage can be denoted by dVi0. SVRR = Change in input offset voltage (dVio) / Change in supply voltage For 741 IC, SVRR = 150uV/V or 96 dB over the range +5V to -18V The lower the value of SVRR, the better will be the op-amp performance The power supply rejection ratio (SVRR) refers to the slight change in output voltage that occurs when the power supply of the op amp changes during operation. SVRR = 20 log / dV0)
  24. Typical Op Amp Parameters Parameter Open-Loop Voltage Gain Input Resistance Output Resistance Supply Voltage Variable vcc/V+ Typical Ideal Values Ranges 105 to 108 105 to Q 10 to IOO Q 5 to 30 V -30V to OV 00 Q N/A N/A

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