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MSP 430

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Published in: Electronics
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PPT on MSP 430 device which is interfaced with computer

Sharath / Delhi

2 years of teaching experience

Qualification: B.Tech/B.E. (DU - 2012)

Teaches: All Subjects, Mathematics, Science, Chemistry, Physics, Algebra, Geography

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  1. MSP 430 SHARATH CHANDRA N G Prezi
  2. INTRODUCTION Designer : TI Bits : 16-bit Low power feature Prezi
  3. PIN OUT • VCC and VSS PI and P2 • TACLK, TAO, and TAI • AO-A4 ACLK and SMCLK • SCLK, SDO, and SCL • XIN and XOUT RST • NMI • TCK, TMS, TCLK, TDI, TDO, and TEST • SBWTDIO and SBWTCK prezi PW or N PACKAGE (TOP VIEW) vcc PI .O/TACLK/ACLK/AO + Pl.1/TAO/AO—/A4+ PI .3/VREF/A1— PI .4/SMCLK/A2+/TCK PI .5/TAO/A2—/SCLK/TMS 10 2 3 4 6 7 13 12 11 10 9 8 XIN/P2.6/TA1 XOUT/PX7 TEST/SBWTCK RST /NMI/SBWTDIO PI —/SDI/SDA/TDO/TDI PI .6/TA1/A3+/SDO/SCL/TDl/TCLK
  4. FUNCTIONAL BLOCK DIAGRAM P12, PIS. vcc vss XIN XOUT ACLK Basec Clock System* SMCLK MCLK 16MHz cpu incl. 16 Registers Emulabon (2BP) JTAG Interface spy-Bi Wire MOB Brownout Protection Watchdog WDT+ 15/16-Bit Timet_A2 2 cc Registers USI Universal Serial Intedace SPI, 12C prezi
  5. • Special function registers • Peripheral registers with byte access and peripheral registers with word access • Random access memory • Bootstrap loader • Information memory • Code memory • Interrupt and reset vectors PrFZi.
  6. Glow POWERöFEATtJRES •AutonomouSPeripheraIs Direct Memory Access Use • Low•operating voltage Mgltiple low Power modes , '-.
  7. TIMERS Basic Timer • Real time clock • Timer A Timer B • Watch Do Timer
  8. WATCH DOG TIMER MODULE Supervision mode : Ensure the correct working of the software Application Perform a PUC (Power Up Clear) • Generate an Interrupt after the counter overflows Interval Timer : • As an Interval Timer it causes no reset but interrupt
  9. IMERB Timefr A Length : 16 bits B length( Programmable ): 8/10/12/16 •Selectable & Configurable-clock sources : ACLK, SMCLK, TACLK (External) • Capture / Compare • Timer A has Yor 5 • Timer B has 3 or 7 CCRs • Timer B CCRs Prezi
  10. SD16(SIGMA • History • Input Channels Input Pins • High-Impedance Buffer - DELTA) Architecture analog SDI 61NCHx inputs AO buffer REFON 1.2V reference 2nd-order medulator SD16SC SDI 6SNGL SDI 60SRR SDI 6XOSR digital filter divider SD16DlVx SD16XDIVx SD161FG SDI 6MEMO SDI 6UNl SDI OF MCI-K SMCLK ACLK TACLK SDI 6SSELx • Programmable Gain Amplifier • Reference Voltage • Sigma-Delta Converter Clock • Interrupts • Conversion Trigger • Supply Voltage Prezi, SR
  11. ThånkYöÜ Prezi

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