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Analog Amplifier Design

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Published in: Physics
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Radio Frequency Amplifier Design

Najeemullah B / Hyderabad

8 years of teaching experience

Qualification: M.Tech (Moguls Institute of learning - 2007)

Teaches: Algebra, Computer Science, Mathematics, Physics, B.Tech Tuition, Electronics, M.Tech Tuition, Railways Exams, RRB, Sub-Inspector Exam, UGC Exams, Chemical, Electrical, Embedded Systems, Hardware Training, Informatica, MCA Subjects

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  1. ANALOG AMPLIFIER DESIGN
  2. Motivation and Design Objective Motivation Design a low power CMOS LNA (Low-Noise Amplifier) Design Objective
  3. 3. My Work This Work Design a 2.4 GHz cascode CMOS LNA. Design a low power CMOS LNA with comparable performance. Comparison between the two LNAs.
  4. Tools and Techniques Tools Virtuoso Schematic Composer and Spectre Simulator from Cadence Design Systems, Inc. Techniques 0.13 um CMOS process
  5. Circuit Diagram Comparison VDD=2V VDD=2V Rout vg2 vgl RFin Lout out Cout vg2 vgl RFin Cout Rout out Lout Traditional CMOS LNA
  6. Schematic of LNA Low Power CMOS INA netE5S natØ41 s—C.pæa •ane end
  7. Simulation Result o Input reflection coefficient (Sll) output reflection coefficient (S22) S22db2Ø Slldb2Ø -2.ØØ -3.ØØ Traditional CMOS LNA S22db2Ø
  8. Simulation Result (cont)) Power gain(S21) noise figure (NF) S21db2Ø S21db2Ø Traditional CMOS LNA
  9. Simulation Result Summary Traditional LNA Low Power LNA Gain (S21) S12 Power 20 dB 7.23 mW 22 dB 4.3 mW
  10. Power Consumption Traditional CMOS LNA P = Idd x Vdd = 3.668mA x 7.23 IIIVV Low Power CMOS LNA P = Idd x Vdd = 2.147mA x 4.3 IIIVV Power Reduction = 41.5%
  11. Conclusion Highlights A current reuse technique is used to decrease power dissipation with increasing amplifier transconductance for the LNA, In my project, for nearly the same power gain, by decreasing gates bias we get 41.5% power reduction An inverter-type amplifier which has a symmetric structure IS used to achieve high linearity for the LNA (not discussed)
  12. Reference Ickjin Kwon and Hyungcheol Shin , "Design of a New Low-Power 2.4 GHz CMOS LINA" , Journal of the Korean Physical Society, vol.40, No. 1, Jan. 2002, pp. 4- 7. John D. Cressler and Guofu Niu, "Silicon-Germanium Heterojunction Bipolar transistors", Artech House, inc. Boston, 2002. Thomas H. Lee, The Design of CMOS Radio-frequency Integrated Circuits, Cambridge University Press, 1998.
  13. THANKS!

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